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 MC74VHC1G86 Single 2-Input Exclusive OR Gate
The MC74VHC1G86 is an advanced high speed CMOS 2-input Exclusive OR gate fabricated with silicon gate CMOS technology. The internal circuit is composed of three stages, including a buffer output which provides high noise immunity and stable output. The MC74VHC1G86 input structure provides protection when voltages up to 7 V are applied, regardless of the supply voltage. This allows the MC74VHC1G86 to be used to interface 5 V circuits to 3 V circuits.
http://onsemi.com MARKING DIAGRAMS
5 1 SC70-5/SC-88A/SOT-353 DF SUFFIX CASE 419A
* * * * * *
High Speed: tPD = 3.5 ns (Typ) at VCC = 5 V Low Power Dissipation: ICC = 1 mA (Max) at TA = 25C Power Down Protection Provided on Inputs Balanced Propagation Delays Pin and Function Compatible with Other Standard Logic Families Chip Complexity: FETs = 54
V8d
Pin 1
5 1 SOT23-5/TSOP-5/SC59-5 DT SUFFIX CASE 483
V8d
Pin 1
IN B
1
5
VCC d = Date Code
IN A
2
PIN ASSIGNMENT
GND 3 4 OUT Y 1 2 3 IN B IN A GND OUT Y VCC
Figure 1. Pinout (Top View)
4 5
IN A IN B
FUNCTION TABLE
=1 OUT Y A Inputs B L H L H Output Y L H H L
Figure 2. Logic Symbol
L L H H
ORDERING INFORMATION
See detailed ordering and shipping information in the package dimensions section on page 4 of this data sheet.
(c) Semiconductor Components Industries, LLC, 2003
1
December, 2003 - Rev. 13
Publication Order Number: MC74VHC1G86/D
MC74VHC1G86
MAXIMUM RATINGS
Symbol VCC VIN VOUT IIK IOK IOUT ICC TSTG TL TJ qJA PD MSL FR VESD DC Supply Voltage DC Input Voltage DC Output Voltage DC Input Diode Current DC Output Diode Current DC Output Sink Current DC Supply Current per Supply Pin Storage Temperature Range Lead Temperature, 1 mm from Case for 10 Seconds Junction Temperature Under Bias Thermal Resistance Power Dissipation in Still Air at 85C Moisture Sensitivity Flammability Rating ESD Withstand Voltage Oxygen Index: 28 to 34 Human Body Model (Note 2) Machine Model (Note 3) Charged Device Model (Note 4) Above VCC and Below GND at 125C (Note 5) SC70-5/SC-88A (Note 1) TSOP-5 SC70-5/SC-88A TSOP-5 Parameter Value *0.5 to )7.0 -0.5 to +7.0 *0.5 to VCC )0.5 -20 $20 $12.5 $25 *65 to )150 260 )150 350 230 150 200 Level 1 UL 94 V-0 @ 0.125 in u2000 u200 N/A $500 V Unit V V V mA mA mA mA C C C C/W mW
ILATCH-UP
Latch-Up Performance
mA
Maximum Ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation under absolute-maximum-rated conditions is not implied. Functional operation should be restricted to the Recommended Operating Conditions. 1. Measured with minimum pad spacing on an FR4 board, using 10 mm-by-1 inch, 2-ounce copper trace with no air flow. 2. Tested to EIA/JESD22-A114-A. 3. Tested to EIA/JESD22-A115-A. 4. Tested to JESD22-C101-A. 5. Tested to EIA/JESD78.
RECOMMENDED OPERATING CONDITIONS
Symbol VCC VIN VOUT TA tr , tf DC Supply Voltage DC Input Voltage DC Output Voltage Operating Temperature Range Input Rise and Fall Time VCC = 3.3 V 0.3 V VCC = 5.0 V 0.5 V Characteristics Min 2.0 0.0 0.0 -55 0 0 Max 5.5 5.5 VCC +125 100 20 Unit V V V C ns/V
Device Junction Temperature versus Time to 0.1% Bond Failures
Junction Temperature C 80 90 100 110 120 130 140 Time, Hours 1,032,200 419,300 178,700 79,600 37,000 17,800 8,900 Time, Years 117.8 47.9 20.4 9.4 4.2 2.0 1.0 NORMALIZED FAILURE RATE FAILURE RATE OF PLASTIC = CERAMIC UNTIL INTERMETALLICS OCCUR TJ = 110 C TJ = 130 C TJ = 100 C TJ = 120 C TJ = 80 C 100 TIME, YEARS TJ = 90 C
1 1 10 1000
Figure 3. Failure Rate vs. Time Junction Temperature
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MC74VHC1G86
DC ELECTRICAL CHARACTERISTICS
VCC Symbol VIH Parameter Minimum High-Level Input Voltage Test Conditions (V) 2.0 3.0 4.5 5.5 2.0 3.0 4.5 5.5 VIN = VIH or VIL IOH = *50 mA VIN = VIH or VIL IOH = *4 mA IOH = *8 mA VOL Maximum Low-Level Output Voltage VIN = VIH or VIL VIN = VIH or VIL IOL = 50 mA VIN = VIH or VIL IOL = 4 mA IOL = 8 mA IIN ICC Maximum Input Leakage Current Maximum Quiescent Supply Current VIN = 5.5 V or GND VIN = VCC or GND 2.0 3.0 4.5 3.0 4.5 2.0 3.0 4.5 3.0 4.5 0 to 5.5 5.5 1.9 2.9 4.4 2.58 3.94 0.0 0.0 0.0 0.1 0.1 0.1 0.36 0.36 $0.1 1.0 2.0 3.0 4.5 Min 1.5 2.1 3.15 3.85 0.5 0.9 1.35 1.65 1.9 2.9 4.4 2.48 3.80 0.1 0.1 0.1 0.44 0.44 $1.0 10 TA = 255C Typ Max TA v 855C Min 1.5 2.1 3.15 3.85 0.5 0.9 1.35 1.65 1.9 2.9 4.4 2.34 3.66 0.1 0.1 0.1 0.52 0.52 $1.0 40 mA mA V Max *555C to 1255C Min 1.5 2.1 3.15 3.85 0.5 0.9 1.35 1.65 Max Unit V
VIL
Maximum Low-Level Input Voltage
V
VOH
Minimum High-Level Output Voltage VIN = VIH or VIL
V
II I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I I I I II I I I I II I I I I I II I I I I I I II I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I I I I II I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I I I II I I I I I II IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I I I I II I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I I I I II II I I I I I II I II I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I I I I II II I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I I II I I
TA = 25C Typ 4.4 5.7 3.5 4.2 5.5 TA 85C -55 TA 125C Min Max Symbol tPLH, tPHL Parameter Test Conditions Min Max Min Max Unit ns Maximum Propagation Delay, Input A or B to Y VCC = 3.3 0.3 V VCC = 5.0 0.5 V CL = 15 pF CL = 50 pF CL = 15 pF CL = 50 pF 11.0 14.5 6.8 8.8 10 13.0 16.5 15.5 19.5 10.0 12.0 10 8.0 10.0 10 CIN Maximum Input Capacitance pF Typical @ 25C, VCC = 5.0 V 10 CPD Power Dissipation Capacitance (Note 6) pF 6. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC(OPR) = CPD VCC fin + ICC. CPD is used to determine the no-load dynamic power consumption; PD = CPD VCC2 fin + ICC VCC.
AC ELECTRICAL CHARACTERISTICS Cload = 50 pF, Input tr = tf = 3.0 ns
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MC74VHC1G86
A or B 50% GND tPLH Y 50% VCC tPHL INPUT CL* VCC VCC OUTPUT
*Includes all probe and jig capacitance. A 1-MHz square input wave is recommended for propagation delay tests.
Figure 4. Switching Waveforms
Figure 5. Test Circuit
DEVICE ORDERING INFORMATION
Device Nomenclature Device Order Number MC74VHC1G86DFT1 MC74VHC1G86DFT2 MC74VHC1G86DTT1 Logic Circuit Indicator MC MC MC Temp Range Identifier 74 74 74 Techno logy VHC1G VHC1G VHC1G Device Function 00 00 00 Package Suffix DF DF DT Tape and Reel Suffix T1 T2 T1 Package Type (Name/SOT#/ Common Name) SC70-5/SC-88A/ SOT-353 SC70-5/SC-88A/ SOT-353 SOT23-5/TSOP-5/ SC59-5
Tape and Reel Size 178 mm (7 in) 3000 Unit 178 mm (7 in) 3000 Unit 178 mm (7 in) 3000 Unit
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.
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4
MC74VHC1G86
CAVITY TAPE
TOP TAPE
TAPE TRAILER (Connected to Reel Hub) NO COMPONENTS 160 mm MIN
COMPONENTS DIRECTION OF FEED
TAPE LEADER NO COMPONENTS 400 mm MIN
Figure 6. Tape Ends for Finished Goods
TAPE DIMENSIONS mm 2.00 4.00 4.00 1.50 TYP 1.75
8.00 $0.30
3.50 $0.50
1 1.00 MIN DIRECTION OF FEED
Figure 7. SC-70-5/SC-88A/SOT-353 DFT1 Reel Configuration/Orientation
TAPE DIMENSIONS mm 2.00
4.00 4.00 1.50 TYP 1.75
8.00 $0.30
3.50 $0.50
1 1.00 MIN DIRECTION OF FEED
Figure 8. SC-70/SC-88A/SOT-353 DFT2 and SOT23-5/TSOP-5/SC59-5 DTT1 Reel Configuration/Orientation
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MC74VHC1G86
t MAX
1.5 mm MIN (0.06 in) 20.2 mm MIN (0.795 in)
13.0 mm $0.2 mm (0.512 in $0.008 in)
A
50 mm MIN (1.969 in)
FULL RADIUS
G
Figure 9. Reel Dimensions
REEL DIMENSIONS
Tape Size 8 mm T and R Suffix T1, T2 A Max 178 mm (7 in) G 8.4 mm, + 1.5 mm, -0.0 (0.33 in + 0.059 in, -0.00) t Max 14.4 mm (0.56 in)
DIRECTION OF FEED
BARCODE LABEL POCKET HOLE
Figure 10. Reel Winding Direction
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MC74VHC1G86
PACKAGE DIMENSIONS
A G
SC70-5/SC-88A/SOT-353 DF SUFFIX 5-LEAD PACKAGE CASE 419A-02 ISSUE G
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. 419A-01 OBSOLETE. NEW STANDARD 419A-02. 4. DIMENSIONS A AND B DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. INCHES MIN MAX 0.071 0.087 0.045 0.053 0.031 0.043 0.004 0.012 0.026 BSC --- 0.004 0.004 0.010 0.004 0.012 0.008 REF 0.079 0.087 MILLIMETERS MIN MAX 1.80 2.20 1.15 1.35 0.80 1.10 0.10 0.30 0.65 BSC --- 0.10 0.10 0.25 0.10 0.30 0.20 REF 2.00 2.20
5
4
S
1 2 3
-B-
D 5 PL
0.2 (0.008)
M
B
M
N J
DIM A B C D G H J K N S
K
SOLDERING FOOTPRINT*
0.50 0.0197
0.65 0.025 0.65 0.025 0.40 0.0157
SCALE 20:1 mm inches
1.9 0.0748
Figure 11. SC-88A/SC70-5/SOT-353
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
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7
MC74VHC1G86
PACKAGE DIMENSIONS
SOT23-5/TSOP-5/SC59-5 DT SUFFIX 5-LEAD PACKAGE CASE 483-01 ISSUE C
4 2 3
D
5 1
S
B
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. 4. A AND B DIMENSIONS DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. MILLIMETERS INCHES DIM MIN MAX MIN MAX A 2.90 3.10 0.1142 0.1220 B 1.30 1.70 0.0512 0.0669 C 0.90 1.10 0.0354 0.0433 D 0.25 0.50 0.0098 0.0197 G 0.85 1.05 0.0335 0.0413 H 0.013 0.100 0.0005 0.0040 J 0.10 0.26 0.0040 0.0102 K 0.20 0.60 0.0079 0.0236 L 1.25 1.55 0.0493 0.0610 M 0_ 10 _ 0_ 10 _ S 2.50 3.00 0.0985 0.1181
L G A J C 0.05 (0.002) H K M
SOLDERING FOOTPRINT*
1.9 0.074
0.95 0.037
2.4 0.094 1.0 0.039 0.7 0.028
SCALE 10:1 mm inches
Figure 12. THIN SOT23-5/TSOP-5/SC59-5
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
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8
MC74VHC1G86/D


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